/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
/*
 * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
 */

#ifndef H_DT_BINDINGS_DRAM_ROCKCHIP_RK3568_H
#define H_DT_BINDINGS_DRAM_ROCKCHIP_RK3568_H

#include <dt-bindings/memory/rockchip-dram.h>

#define PHY_DDR4_DS_ODT_DISABLE (0x0)
#define PHY_DDR4_DS_ODT_556ohm (0x1)
#define PHY_DDR4_DS_ODT_279ohm (0x2)
#define PHY_DDR4_DS_ODT_185ohm (0x3)
#define PHY_DDR4_DS_ODT_139ohm (0x4)
#define PHY_DDR4_DS_ODT_111ohm (0x5)
#define PHY_DDR4_DS_ODT_93ohm (0x6)
#define PHY_DDR4_DS_ODT_79ohm (0x7)
#define PHY_DDR4_DS_ODT_69ohm (0x8)
#define PHY_DDR4_DS_ODT_62ohm (0x9)
#define PHY_DDR4_DS_ODT_55ohm (0xa)
#define PHY_DDR4_DS_ODT_50ohm (0xb)
#define PHY_DDR4_DS_ODT_46ohm (0xc)
#define PHY_DDR4_DS_ODT_42ohm (0xd)
#define PHY_DDR4_DS_ODT_39ohm (0xe)
#define PHY_DDR4_DS_ODT_37ohm (0xf)
#define PHY_DDR4_DS_ODT_34ohm (0x18)
#define PHY_DDR4_DS_ODT_32ohm (0x19)
#define PHY_DDR4_DS_ODT_31ohm (0x1a)
#define PHY_DDR4_DS_ODT_29ohm (0x1b)
#define PHY_DDR4_DS_ODT_27ohm (0x1c)
#define PHY_DDR4_DS_ODT_26ohm (0x1d)
#define PHY_DDR4_DS_ODT_25ohm (0x1e)
#define PHY_DDR4_DS_ODT_24ohm (0x1f)

#define PHY_LPDDR4_DS_ODT_DISABLE (0x0)
#define PHY_LPDDR4_DS_ODT_576ohm (0x1)
#define PHY_LPDDR4_DS_ODT_289ohm (0x2)
#define PHY_LPDDR4_DS_ODT_192ohm (0x3)
#define PHY_LPDDR4_DS_ODT_144ohm (0x4)
#define PHY_LPDDR4_DS_ODT_115ohm (0x5)
#define PHY_LPDDR4_DS_ODT_96ohm (0x6)
#define PHY_LPDDR4_DS_ODT_82ohm (0x7)
#define PHY_LPDDR4_DS_ODT_72ohm (0x8)
#define PHY_LPDDR4_DS_ODT_64ohm (0x9)
#define PHY_LPDDR4_DS_ODT_57ohm (0xa)
#define PHY_LPDDR4_DS_ODT_52ohm (0xb)
#define PHY_LPDDR4_DS_ODT_48ohm (0xc)
#define PHY_LPDDR4_DS_ODT_44ohm (0xd)
#define PHY_LPDDR4_DS_ODT_41ohm (0xe)
#define PHY_LPDDR4_DS_ODT_38ohm (0xf)
#define PHY_LPDDR4_DS_ODT_36ohm (0x18)
#define PHY_LPDDR4_DS_ODT_34ohm (0x19)
#define PHY_LPDDR4_DS_ODT_32ohm (0x1a)
#define PHY_LPDDR4_DS_ODT_30ohm (0x1b)
#define PHY_LPDDR4_DS_ODT_28ohm (0x1c)
#define PHY_LPDDR4_DS_ODT_27ohm (0x1d)
#define PHY_LPDDR4_DS_ODT_26ohm (0x1e)
#define PHY_LPDDR4_DS_ODT_25ohm (0x1f)

#define PHY_LPDDR4X_DS_ODT_UP_DISABLE (0x0)
#define PHY_LPDDR4X_DS_ODT_UP_646ohm (0x1)
#define PHY_LPDDR4X_DS_ODT_UP_323ohm (0x2)
#define PHY_LPDDR4X_DS_ODT_UP_215ohm (0x3)
#define PHY_LPDDR4X_DS_ODT_UP_162ohm (0x4)
#define PHY_LPDDR4X_DS_ODT_UP_129ohm (0x5)
#define PHY_LPDDR4X_DS_ODT_UP_108ohm (0x6)
#define PHY_LPDDR4X_DS_ODT_UP_92ohm (0x7)
#define PHY_LPDDR4X_DS_ODT_UP_81ohm (0x8)
#define PHY_LPDDR4X_DS_ODT_UP_72ohm (0x9)
#define PHY_LPDDR4X_DS_ODT_UP_65ohm (0xa)
#define PHY_LPDDR4X_DS_ODT_UP_59ohm (0xb)
#define PHY_LPDDR4X_DS_ODT_UP_54ohm (0xc)
#define PHY_LPDDR4X_DS_ODT_UP_50ohm (0xd)
#define PHY_LPDDR4X_DS_ODT_UP_46ohm (0xe)
#define PHY_LPDDR4X_DS_ODT_UP_43ohm (0xf)
#define PHY_LPDDR4X_DS_ODT_UP_40ohm (0x18)
#define PHY_LPDDR4X_DS_ODT_UP_38ohm (0x19)
#define PHY_LPDDR4X_DS_ODT_UP_36ohm (0x1a)
#define PHY_LPDDR4X_DS_ODT_UP_34ohm (0x1b)
#define PHY_LPDDR4X_DS_ODT_UP_32ohm (0x1c)
#define PHY_LPDDR4X_DS_ODT_UP_31ohm (0x1d)
#define PHY_LPDDR4X_DS_ODT_UP_29ohm (0x1e)
#define PHY_LPDDR4X_DS_ODT_UP_28ohm (0x1f)

#define PHY_LPDDR4X_DS_ODT_DOWN_DISABLE (0x0)
#define PHY_LPDDR4X_DS_ODT_DOWN_513ohm (0x1)
#define PHY_LPDDR4X_DS_ODT_DOWN_259ohm (0x2)
#define PHY_LPDDR4X_DS_ODT_DOWN_172ohm (0x3)
#define PHY_LPDDR4X_DS_ODT_DOWN_130ohm (0x4)
#define PHY_LPDDR4X_DS_ODT_DOWN_104hm (0x5)
#define PHY_LPDDR4X_DS_ODT_DOWN_86hm (0x6)
#define PHY_LPDDR4X_DS_ODT_DOWN_74ohm (0x7)
#define PHY_LPDDR4X_DS_ODT_DOWN_65ohm (0x8)
#define PHY_LPDDR4X_DS_ODT_DOWN_58ohm (0x9)
#define PHY_LPDDR4X_DS_ODT_DOWN_52ohm (0xa)
#define PHY_LPDDR4X_DS_ODT_DOWN_47ohm (0xb)
#define PHY_LPDDR4X_DS_ODT_DOWN_43ohm (0xc)
#define PHY_LPDDR4X_DS_ODT_DOWN_40ohm (0xd)
#define PHY_LPDDR4X_DS_ODT_DOWN_37ohm (0xe)
#define PHY_LPDDR4X_DS_ODT_DOWN_35ohm (0xf)
#define PHY_LPDDR4X_DS_ODT_DOWN_32ohm (0x18)
#define PHY_LPDDR4X_DS_ODT_DOWN_30ohm (0x19)
#define PHY_LPDDR4X_DS_ODT_DOWN_29ohm (0x1a)
#define PHY_LPDDR4X_DS_ODT_DOWN_27ohm (0x1b)
#define PHY_LPDDR4X_DS_ODT_DOWN_26ohm (0x1c)
#define PHY_LPDDR4X_DS_ODT_DOWN_25ohm (0x1d)
#define PHY_LPDDR4X_DS_ODT_DOWN_24ohm (0x1e)
#define PHY_LPDDR4X_DS_ODT_DOWN_23ohm (0x1f)

#endif /* _DT_BINDINGS_DRAM_ROCKCHIP_RK3568_H */
